IEEE International High Level Design
Validation and Test Workshop 2006
Hyatt Regency Monterey, Monterey, California, Nov 9-10, 2006.
Call for papers (pdf)
HLDVT 2006 is the eleventh in a series of annual workshops designed to bring together a community of researchers in the areas of design, validation, and test. The workshop revolves around a common theme of addressing the integration of multiple functions on-chip at higher levels of design abstraction, and the techniques and methodologies for modeling, analyzing, and validating such systems. In particular, the workshop has become a unique forum in recent years for researchers and practitioners to discuss the practical issues associated with simulation and validation of extremely large designs. Topics of interest include:
The Program Committee invites authors to submit papers not to exceed 8 pages (10pt minimum font size, reasonable margins and line spacing) describing original and unpublished work. On the title page, please indicate: paper title, name and affiliations of all authors, and the topic category. Also identify a contact author and provide complete mailing address, phone number, fax number and an e-mail address. Panel proposals are also invited. All submissions must be made electronically in PDF or Postscript format using the paper submission webpage:
Please ensure that your PDF or Postscript file is readable by Acrobat Reader or Ghostview. The submission of an paper or panel proposal will be considered evidence that upon acceptance, the author(s) will present their paper or organize their panel at the workshop.
Authors of selected HLDVT'06 papers will be invited to submit extended versions for a special issue of ACM Transactions on Design Automation of Electronic Systems, to be published in 2007.
HLDVT 2006 is sponsored by the IEEE Computer Society Test Technology Technical Council and the IEEE Computer Society Design Automation Technical Committee. HLDVT 2006 receives corporate support from IBM.